{"@context":"https://schema.org","@type":"JobPosting","title":"IC Layout Design Engineer","description":"

IC Layout Design Engineer, Analog/Mixed-Signal (FinFET)
\nRichardson, TX (Hybrid) | Direct Hire | $43–$60/hr + OT

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Love custom analog layout on leading-edge nodes? We’re hiring a strong layout engineer for a long-term program on advanced TSMC processes.

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What you’ll do

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Full-custom layout and verification of PLLs, SerDes, ADCs/DACs, and sensitive RF/analog blocks
Balance area, performance, and power while meeting physical verification requirements
Support verification from sub-block to top level, and help build layout schedules and estimates

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What you bring

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3–5+ years of RF/analog/mixed-signal layout in Cadence Virtuoso/VXL and Calibre (DRC, LVS, ERC)
FinFET or GAA experience at 7nm, 4nm, or 3nm (TSMC preferred; Samsung also counts)
Solid grasp of matching, shielding, guard rings, latch-up, EM, IR drop, and other layout-dependent effects
A BSEE or related degree, or a strong mask design background with an associate’s or technical degree
U.S. citizen or green card holder (ITAR)
Bonus: PERL or SKILL scripting

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Why join

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A hybrid schedule: onsite Tuesday through Thursday, home Monday and Friday, with flexible hours around a 10–2 core
Remote is possible for exceptional candidates
A small, collaborative team that’s growing fast
A clear path to Senior, Principal, and Layout Lead roles, with chip-level ownership along the way

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Interested? Send your resume and a list of the process nodes you’ve worked on.

","datePosted":"2026-10-21","hiringOrganization":{"@type":"Organization","name":"Talent Edge"},"validThrough":"2026-11-20","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","streetAddress":"800 E. Campbell Rd., Ste. 101, Richardson, Texas 75081","addressRegion":"None","postalCode":"None","addressCountry":"None"}},"employmentType":"OTHER","identifier":{"@type":"PropertyValue","name":"Talent Edge","value":"17925923301660121345GLX"},"directApply":true,"industry":"None"}